Hardware optimization for radiation measurement using CMOS image sensors

Abstract

This article presents the design, implementation, and hardware optimization of a radiation detection system based on a commercial CMOS optoelectronic imaging transducer and an ultra-low-power FPGA, geared towards space applications with limited computational and energy resources. The work addresses the efficient implementation of an event detection algorithm, previously validated in software, on a Lattice iCE40HX4K FPGA. To achieve this, the system architecture was designed using a memory-centric approach, replacing register-based methods. This allowed for the integration of functionalities such as event detection, defective pixel filtering, counting, and histogram generation, operating at a rate of one frame per second. Experimental validation was performed using real sequences of irradiated images, previously acquired with the same optoelectronic transducer. The histograms generated by the FPGA show a deviation of less than 3\% compared to a reference model implemented in MATLAB. As a result, the optimized architecture achieves a reduction of over 90\% in the use of logical resources, while maintaining the original functionality.