Implementation and testing of a FSK demodulator
DOI:
https://doi.org/10.37537/rev.elektron.5.1.115.2021Keywords:
FSK, Demodulation, Balanced Cuadri-correlator, Test, SNR, AWGN, BER, FPGA, VHDLAbstract
This work describes the implementation and testing of a FSK demodulator, within the framework of a modem re-engineering for navy communications. It was developed over a Spartan 6 XCSLX25 FPGA with its code in VHDL. For testing, a modulator was implemented in a STM32F407 microcontroller where different noise levels were added to the signal to try out the system.Downloads
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